Rapid Energy Estimation for Hardware-Software Codesign Using FPGAs. (4th September 2006)
- Record Type:
- Journal Article
- Title:
- Rapid Energy Estimation for Hardware-Software Codesign Using FPGAs. (4th September 2006)
- Main Title:
- Rapid Energy Estimation for Hardware-Software Codesign Using FPGAs
- Authors:
- Ou, Jingzhao
Prasanna, Viktor K. - Abstract:
- Abstract : By allowing parts of the applications to be executed either on soft processors (as software programs) or on customized hardware peripherals attached to the processors, FPGAs have made traditional energy estimation techniques inefficient for evaluating various design tradeoffs. In this paper, we propose a high-level simulation-based two-step rapid energy estimation technique for hardware-software codesign using FPGAs. In the first step, a high-level hardware-software cosimulation technique is applied to simulate both the hardware and software components of the target application. High-level simulation results of both software programs running on the processors and the customized hardware peripherals are gathered during the cosimulation process. In the second step, the high-level simulation results of the customized hardware peripherals are used to estimate the switching activities of their corresponding register-transfer/gate level ("low-level") implementations. We use this information to employ an instruction-level energy estimation technique and a domain-specific energy performance modeling technique to estimate the energy dissipation of the complete application. A Matlab/Simulink-based implementation of our approach and two numerical computation applications show that the proposed energy estimation technique can achieve more than 6000x speedup over low-level simulation-based techniques while sacrificing less than 10% estimation accuracy. Compared with theAbstract : By allowing parts of the applications to be executed either on soft processors (as software programs) or on customized hardware peripherals attached to the processors, FPGAs have made traditional energy estimation techniques inefficient for evaluating various design tradeoffs. In this paper, we propose a high-level simulation-based two-step rapid energy estimation technique for hardware-software codesign using FPGAs. In the first step, a high-level hardware-software cosimulation technique is applied to simulate both the hardware and software components of the target application. High-level simulation results of both software programs running on the processors and the customized hardware peripherals are gathered during the cosimulation process. In the second step, the high-level simulation results of the customized hardware peripherals are used to estimate the switching activities of their corresponding register-transfer/gate level ("low-level") implementations. We use this information to employ an instruction-level energy estimation technique and a domain-specific energy performance modeling technique to estimate the energy dissipation of the complete application. A Matlab/Simulink-based implementation of our approach and two numerical computation applications show that the proposed energy estimation technique can achieve more than 6000x speedup over low-level simulation-based techniques while sacrificing less than 10% estimation accuracy. Compared with the measured results, our experimental results show that the proposed technique achieves an average estimation error of less than 12%. … (more)
- Is Part Of:
- EURASIP journal on embedded systems. Volume 2006(2006)
- Journal:
- EURASIP journal on embedded systems
- Issue:
- Volume 2006(2006)
- Issue Display:
- Volume 2006, Issue 2006 (2006)
- Year:
- 2006
- Volume:
- 2006
- Issue:
- 2006
- Issue Sort Value:
- 2006-2006-2006-0000
- Page Start:
- Page End:
- Publication Date:
- 2006-09-04
- Subjects:
- Embedded computer systems -- Periodicals
Systèmes enfouis (Informatique)
Embedded computer systems
Periodicals
Electronic journals
006.22 - Journal URLs:
- https://link.springer.com/journal/13639 ↗
http://link.springer.com/ ↗ - DOI:
- 10.1155/ES/2006/98045 ↗
- Languages:
- English
- ISSNs:
- 1687-3955
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - BLDSS-3PM
British Library HMNTS - ELD Digital store - Ingest File:
- 10290.xml