An Optimal Implementation on FPGA of a Hopfield Neural Network. (22nd August 2011)

• Record Type: Journal Article
• Authors: Mansour, W.; Ayoubi, R.; Ziade, H.; Velazco, R.; EL Falou, W.
• Other Names: Del Giudice Paolo Academic Editor.
• Is Part Of: Advances in artificial neural systems. (2011)
• Publication Date: 2011-08-22
• Subjects: Neural networks (Computer science) -- Periodicals; Neural networks (Computer science); Periodicals; Electronic journals; 006.32
• DOI: 10.1155/2011/189368
• Languages: English
• ISSNs: 1687-7594

Abstract

Abstract : The associative Hopfield memory is a form of recurrent Artificial Neural Network (ANN) that can be used in applications such as pattern recognition, noise removal, information retrieval, and combinatorial optimization problems. This paper presents the implementation of the Hopfield Neural Network (HNN) parallel architecture on a SRAM-based FPGA. The main advantage of the proposed implementation is its high performance and cost effectiveness: it requiresO ( 1 ) multiplications andO ( log N ) additions, whereas most others requireO ( N ) multiplications andO ( N ) additions.