Active input current shaping with new MPC structured TP-TL-5L converter with reduced PSD count for renewable energy conversion. (September 2019)

• Record Type: Journal Article
• Authors: Yalla, Naveen; Agarwal, Pramod
• Is Part Of: International journal of electrical power & energy systems. Volume 110(2019)
• Page Start: 386
• Page End: 399
• Publication Date: 2019-09
• Subjects: Front end converters -- Improved power factor converters -- Power quality -- Multi level converters -- Reduced part count; Electrical engineering -- Periodicals; Electric power systems -- Periodicals; Électrotechnique -- Périodiques; Réseaux électriques (Énergie) -- Périodiques; Electric power systems; Electrical engineering; Periodicals; 621.3
• DOI: 10.1016/j.ijepes.2019.03.023
• Languages: English
• ISSNs: 0142-0615

Abstract

Highlights: Demands minimum PSD count because, the absence of clamping devices. The number of maximum voltage rating of PSDs are minimum. Minimum total blocking voltage. The efficiency of overall converter system is high. More reliable and the overall performance is good. Abstract: In this paper, a new multi-point clamped (MPC), three phase two leg, five level front end high power factor converter (TP-TL-5LHPFC) for direct connected wind energy conversion system with permanent magnet synchronous generator (PMSG) is proposed. The converter can be modeled and modulated similar to other existing MPC structured converters with omission of clamping diodes and bi directional switches. The proposed converter has an advantage of reduced power semi conductor device (PSD) count along with reduced maximum device stress. The concept can be extended to increase the converter voltage levels by adding extra half bridges at the top and bottom of the converter. A factor (normalized index) is introduced and comprehensive comparative analysis with N level existing topologies is carried out. The minimum value of normalized index makes the proposed topology is suitable option for medium voltage and high power applications. In addition, the fault ride through capability is one of the key performance indicator for large motor drive systems is investigated on proposed topology under various unbalanced input conditions i.e. voltage sag and line to ground fault. Further, steady state and transient performance of topology during load as well as dc link voltage variation is presented. Minimum distorted and balanced line currents with nearly unity power factor (UPF) are drawn from supply by implementing negative sequence elimination control algorithm. The validation of proposed topology is verified with simulation and a down scaled experimental setup.