A high-resolution and glitch-free all-digital variable length ring oscillator design on an FPGA. (March 2019) - Tung, Dam Minh; Van Toan, Nguyen; Lee, Jeong-Gun
Abstract: This paper proposes an all-digital variable length ring oscillator (VLRO) circuit that is capable of easily controlling its output frequency without generating glitches at the frequency transitions on a field programmable gate array (FPGA). It includes two main blocks: 1) A coarse-tuning block is to widen the frequency range and 2) A fine-tuning block which is based on a dedicated high-speed carry chain is devised to improve the frequency resolution. Thanks to the use of high-speed carry chain, our circuit achieves a fine-grained delay resolution of 50 ps in average, which has a finer resolution than that of the state-of-the-art VLRO design in which the glitch problem has been solved with "lookup table" based coarse-grained delay lines. The proposed VLRO has been implemented on a Xilinx Spartan-6 FPGA for verifying its functional/timing correctness. It switches correctly between 22 different coarse-grained frequencies and 21 different fine-grained frequencies under different supply voltages.