Subsystem under 3D-Storage Class Memory on a chip. (March 2019) - Guo, Jipeng; Wang, Haibo; Jing, Weiliang; Li, Haixin; Du, Yuan; Song, Zhitang; Chen, Bomy
Abstract: In this paper, we propose a subsystem architecture under 3D-Storage Class Memory (3D-SCM), termed SuS, to solve the memory and power wall problems. Placing the processing unit under the 3D-SCM achieves high performance. We evaluate SuS using gem5 and the GPGPU-Sim simulator. The simulation results for the central processing unit (CPU)-based SuS architecture reveal a 100% performance improvement and a 73% energy reduction compared to the CPU architecture using dual in-line memory modules and a 4% performance improvement with a 27% energy reduction compared to the CPU architecture using hybrid memory cube. Moreover, the graphics processing unit (GPU)-based SuS architecture simulation results on the neural network benchmark demonstrate performance improvements of 17% and 7% compared to GPU architectures with graphics double data rate series memory and high bandwidth memory, respectively.