Scalable, energy-aware system modeling and application-specific reconfiguration of MPSocs with a type-2 fuzzy logic system. (March 2019)

• Record Type: Journal Article
• Authors: Hussain, Ishfaq; Murtza, Shahid Ali; Qadri, Muhammad Yasir; Fleury, Martin; Qadri, Nadia N.
• Is Part Of: Computers & electrical engineering. Volume 74(2019)
• Page Start: 292
• Page End: 304
• Publication Date: 2019-03
• Subjects: Design space exploration -- Multiprocessor System-on-a-Chip -- Multicore processor -- Type 2 Fuzzy Logic System -- Reconfiguration; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2019.01.015
• Languages: English
• ISSNs: 0045-7906

Abstract

Abstract: This paper demonstrates that interval type-2 Fuzzy Logic Systems (FLS's) are suited to Multiprocessor System-on-a-Chip (MPSoC) design modeling because of their ability to handle the uncertainty associated with input parameters. This makes for a scalable modeling process, whereas prior usage of type-1 FLS's for modeling inhibited scalability. Specifically, the paper proposes a type-2 Takagi Sugeno Kang (TSK) FLS for modeling MPSoCs built around a multicore processor with shared memory. The paper also presents a TSK FLS reconfiguration methodology in order to dynamically reduce the energy consumption of such a multiprocessor. Modeling of MPSoC's by means of the type-2 TSK FLS was found to be effective in terms of a reduction in the Energy Delay Product when applied to five large-scale numerical processing applications on an MPSoC. In fact, experimental results show a significant reduction (by 87–93% across the applications) in the energy consumption of an MPSoC.