Analysis and design of ultra-low-voltage low-power rail-to-rail VCO-based comparator in subthreshold region. (February 2019)

• Record Type: Journal Article
• Authors: Kabirpour, Saeideh; Jalali, Mohsen
• Is Part Of: Microelectronics journal. Volume 84(2019)
• Page Start: 106
• Page End: 114
• Publication Date: 2019-02
• Subjects: VCO-based comparator -- Phase-frequency detector -- Subthreshold region -- Ultra-low-voltage; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2018.11.009
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: In this paper, analysis and design of an ultra-low-voltage low-power voltage controlled oscillator (VCO)-based comparator operating in subthreshold region is presented. It is composed of a pseudo differential VCO and a phase-frequency detector (PFD). An analytical design approach is developed resulting in closed-form expressions for important properties of the comparators such as resolution, comparison time, comparison energy and input-referred noise. Using the developed expressions, the design of phase-frequency detector (PFD) and its limitations is fully addressed and the possibility of using a signal premapping strategy allowing for rail-to-rail operation is investigated. To comprehensively verify the operation of the proposed comparator, it has been adopted in an 8 bits, 13 kS/s SAR ADC suitable for biomedical applications. Using a 0.18 μm standard CMOS process under a 0.5-V supply voltage, the total power consumption is about 153 nW. The simulated SNDR and SFDR are 49.15 dB and 57.76 dB, respectively. The DNL is +0.12/−0.13 LSB and the INL is +0.24/−0.51 LSB.