Virtual impedance based phase locked loop for control of parallel inverters connected to islanded microgrid. (January 2019)

• Record Type: Journal Article
• Authors: Sharma, Rahul; Suhag, Sathans
• Is Part Of: Computers & electrical engineering. Volume 73(2019)
• Page Start: 58
• Page End: 70
• Publication Date: 2019-01
• Subjects: Droop control -- Islanded microgrid -- Virtual impedance -- Inverter -- PLL; PLL phase locked loop -- PCC point of common coupling -- dq0 Synchronous reference frame -- PHIL power hardware in the loop -- LPF low-pass filters -- P-U active power-voltage -- Q-f reactive power-frequency -- αβ0 orthogonal stationary frame -- EMS energy management system; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2018.11.005
• Languages: English
• ISSNs: 0045-7906

Abstract

Highlights: The virtual impedance based PLL control loop to reduce the load angle deviation at measured voltage. Virtual impedance based proper power sharing without any power calculation and LPF between parallel inverters in the islanded microgrid. The proposed control scheme has the inherent droop characteristics where the coefficients are the virtual impedance values which can be adjusted. Power smoothening is proposed to suppress the steady state error due to the effect of coupling terms in active/reactive power. Experimental and simulation results are presented and discussed to validate the proposed control scheme. Abstract: This paper proposed modified phase locked loop (PLL) based inverter control scheme in islanded microgrid environment. Deviations in the synchronizing angle of the phase locked loop and the resistive nature of the lines are taken into account. The effects of the improper synchronization and the poor performance of the improved droop control scheme due to the resistive nature of the lines are studied. Virtual impedance based PLL is proposed to control parallel inverters and effectively compensate the improper power sharing. The proposed scheme improves synchronization, decoupling between the active/reactive power and transient response. Unlike droop control, this scheme does not require any power calculations. Simulation is performed in MATLAB SIMULINK and compared with the conventional control to verify the effectiveness and improvement in the results. Experimental results are also presented and discussed to validate the simulation results with Power Hardware in the Loop using the setup of 5 kW and 3 kW parallel inverters.