7‐1: Invited Paper: Application of Low‐Frequency Clock Signals to Gate Driver Circuits. Issue 1 (2nd June 2017)
- Record Type:
- Journal Article
- Title:
- 7‐1: Invited Paper: Application of Low‐Frequency Clock Signals to Gate Driver Circuits. Issue 1 (2nd June 2017)
- Main Title:
- 7‐1: Invited Paper: Application of Low‐Frequency Clock Signals to Gate Driver Circuits
- Authors:
- Lin, Chih-Lung
Cheng, Mao-Hsun - Abstract:
- Abstract : This paper collates design concepts of low‐power gate driver circuits, and our related work is reviewed. Many approaches to power consumption amelioration have been developed and focus on different parts of circuit structures. Recently, low‐frequency clock signals are adopted to further reduce both power consumption and thin‐film transistor (TFT) threshold voltage shifts (ΔVTH ).
- Is Part Of:
- Digest of technical papers. Volume 48:Issue 1(2017)
- Journal:
- Digest of technical papers
- Issue:
- Volume 48:Issue 1(2017)
- Issue Display:
- Volume 48, Issue 1 (2017)
- Year:
- 2017
- Volume:
- 48
- Issue:
- 1
- Issue Sort Value:
- 2017-0048-0001-0000
- Page Start:
- 64
- Page End:
- 67
- Publication Date:
- 2017-06-02
- Subjects:
- Gate driver circuit -- power consumption -- thin-film transistors
Information display systems -- Congresses
621.3815422 - Journal URLs:
- http://catalog.hathitrust.org/api/volumes/oclc/1799368.html ↗
http://onlinelibrary.wiley.com/journal/10.1002/(ISSN)2168-0159 ↗
http://ojps.aip.org/dbt/dbt.jsp?KEY=SIDSYM ↗
http://sid.aip.org/digest ↗
http://onlinelibrary.wiley.com/ ↗ - DOI:
- 10.1002/sdtp.11559 ↗
- Languages:
- English
- ISSNs:
- 0097-966X
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 8271.680000
British Library DSC - BLDSS-3PM
British Library STI - ELD Digital store - Ingest File:
- 9345.xml