HtComp: bringing reconfigurable hardware to future high-performance applications. (2018)

• Record Type: Journal Article
• Authors: Cilardo, Alessandro
• Is Part Of: International journal of high performance computing and networking. Volume 12:Number 1(2018)
• Page Start: 74
• Page End: 83
• Publication Date: 2018
• Subjects: FPGAs -- HPC -- reconfigurable computing -- GPU-like computing -- memory partitioning -- on-chip interconnect synthesis; High performance computing -- Periodicals; Computer networks -- Periodicals; High performance computing; Periodicals; 004.05
• Languages: English
• ISSNs: 1740-0562

Abstract

Current trends in computer architecture are increasingly moving towards heterogeneous platforms, now including FPGAs as first-class components enabling unprecedented levels of performance and power-efficiency. Programming such next-generation machines is however extremely difficult as it requires architecture-specific code and low-level hardware design. This paper describes the main outcomes of the HtComp project, a two-year research programme aimed at exploring methodologies and tools allowing the automated generation of FPGA-based accelerators from high-level applications written in traditional software languages. In particular, the paper describes the main contributions brought by the project, covering the generation of hardware systems from high-level parallel code, the performance-oriented optimisation of memory architectures tailored on the application access patterns, as well as the automated definition of application-driven special-purpose on-chip interconnects. Overall, the above innovations contributed to creating a viable path allowing generic software developers to access tomorrow's hardware-accelerated high-performance platforms with minimum development overheads.