PvFPGA: paravirtualising an FPGA-based hardware accelerator towards general purpose computing. (2017)

• Record Type: Journal Article
• Authors: Wang, Wei; Bolic, Miodrag; Parri, Jonathan
• Is Part Of: International journal of high performance computing and networking. Volume 10:Number 3(2017)
• Page Start: 179
• Page End: 193
• Publication Date: 2017
• Subjects: field-programmable gate array -- FPGA -- hardware accelerator -- virtualisation -- hyperrequesting -- streaming pipeline -- DMA context switch; High performance computing -- Periodicals; Computer networks -- Periodicals; High performance computing; Periodicals; 004.05
• Languages: English
• ISSNs: 1740-0562

Abstract

This paper presents an ameliorated design of pvFPGA, which is a novel system design solution for virtualising an FPGA-based hardware accelerator by a virtual machine monitor (VMM). The accelerator design on the FPGA can be used for accelerating various applications, regardless of the application computation latencies. In the implementation, we adopt the Xen VMM to build a paravirtualised environment, and a Xilinx Virtex-6 as an FPGA accelerator. The data transferred between the x86 server and the FPGA accelerator through direct memory access (DMA), and a streaming pipeline technique is adopted to improve the efficiency of data transfer. Several solutions to solve streaming pipeline hazards are discussed in this paper. In addition, we propose a technique, hyper-requesting, which enables portions of two requests bidding to different accelerator applications to be processed on the FPGA accelerator simultaneously through DMA context switches, to achieve request level parallelism. The experimental results show that hyper-requesting reduces request turnaround time by up to 80%.