Design of retimed digital filters using MCM methodology for noise removal in EEG. (2017)

• Record Type: Journal Article
• Authors: Yagain, Deepa; Rao, T.N. Chandrashekar; Krishna, A. Vijay
• Is Part Of: International journal of computer aided engineering and technology. Volume 9:Number 3(2017)
• Page Start: 271
• Page End: 288
• Publication Date: 2017
• Subjects: retiming -- pipelining -- multiple constant multiplication -- MCM -- clock period minimisation -- Floyd Warshall algorithm -- electroencephalograms -- EEG signals -- finite impulse response filters -- FIR filters -- infinite impulse response filters -- IIR filters -- gate-level area optimisation -- gate-level delay optimisation -- field programmable gate arrays -- FPGAs -- filter design -- retimed digital filters -- noise removal -- digital signal processing -- DSP block optimisation; Computer-aided engineering -- Periodicals; 620.00285
• Languages: English
• ISSNs: 1757-2657

Abstract

High level synthesis of digital signal processing (DSP) systems converts the abstract behavioural specification in to register transfer level (RTL) description. The main objective of high level synthesis algorithms is to generate structure that satisfies various design constraints such as area, power and operating frequency. A modified MCM-based retiming algorithm is designed in this paper for DSP block optimisation. This is achieved by two ways in the present work. Firstly, pipelining and retiming is used as a high level synthesis optimisation methodology which can increase the operating frequency in sequential circuits such as digital filters. As the next step, MCM can be used to find the optimal solution for digital filters that gives implementation consisting of minimal number of shifters and adders/subtractors for a given constant co-efficient set. Electro-encephalography (EEG) is considered as an application in this work which requires sophisticated filters in removing the power noise and random noise introduced during the recording process.