A compact abstraction of manufacturing nodes in a supply network. (1st October 2007) - Duarte, Brett M.; Fowler, John W.; Knutson, Kraig; Gel, Esma; , Dan Shunk
This paper presents the abstraction process to support a modular approach for simulating semiconductor supply networks by modelling each node in the network as a 'Functional Block'. In particular, a functional block to represent wafer fabrication facilities is developed, which strikes a suitable balance between a high level abstraction and modelling the detailed complexities of a manufacturing facility. We demonstrate that the model is able to produce performance estimates (average Cycle Time (CT) and Throughput (TH)) that resemble the behaviour of real-life systems and are accurate with respect to comparisons with a detailed Discrete Event Simulation (DES) model.