Digital-domain Chopping Technique for PLL-Based Sensor Interfaces. (2015)

• Record Type: Journal Article
• Authors: Marin, J.; Van Rethy, J.; Danneels, H.; Vergauwen, J.; Gielen, G.
• Is Part Of: Procedia engineering. Volume 120(2015)
• Page Start: 507
• Page End: 510
• Publication Date: 2015
• Subjects: Chopping -- time-based -- interface -- 1/f noise -- PLL-based conversion; Engineering -- Congresses; Engineering -- Periodicals; Engineering; Conference proceedings; Periodicals; 620.005
• DOI: 10.1016/j.proeng.2015.08.685
• Languages: English
• ISSNs: 1877-7058

Abstract

Abstract: Highly-digital, time-/frequency-based architectures have become an attractive alternative to amplitude-based techniques for sensor interfaces due to their high time resolution, low power and area scalability potential. However, even though thermal noise can be addressed by applying oversampling, offset and 1/f noise limit the resolution at low frequencies. Therefore, dynamic offset cancellation techniques like chopping and autozeroing, used in traditional circuits, must be adapted to such time-based implementations. This paper presents a digital-domain chopping technique suited for offset and 1/f-noise cancellation in PLL-based sensor interfaces. System-level simulations demonstrate a resolution increase from 11 to 15 bits for a 200 Hz signal bandwidth.