Enhanced Intrinsic Voltage Gain in Artificially Stacked Bilayer CVD Graphene Field Effect Transistors. Issue 11 (20th September 2017) - Pandey, Himadri
Abstract: We report on electronic transport in dual‐gate, artificially stacked bilayer graphene field effect transistors (BiGFETs) fabricated from large‐area chemical vapor deposited (CVD) graphene. The devices show enhanced tendency to current saturation, which leads to reduced minimum output conductance values. This results in improved intrinsic voltage gain of the devices when compared to monolayer graphene FETs. We employ a physics based compact model originally developed for Bernal stacked bilayer graphene FETs (BSBGFETs) to explore the observed phenomenon. The improvement in current saturation may be attributed to increased charge carrier density in the channel and thus reduced saturation velocity due to carrier‐carrier scattering. Abstract : Bilayer graphene has been suggested as an alternative for obtaining enhanced current saturation in graphene transistors. Large‐area CVD grown graphene monolayers are used to prepare scalable artificially stacked bilayers (ASBLG) to study its electronic properties. Transistors based on ASBLG exhibit a reduction in minimum output conductance, resulting in an improved voltage gain compared to monolayer graphene transistors. The plausible reasons behind the present observation are discussed.