Algorithms and analysis of scheduling for low-power high-performance DSP on VLIW processors. (8th August 2005)

• Record Type: Journal Article
• Authors: Shao, Zili; Zhuge, Qingfeng; Zhang, Youtao; Sha, Edwin H-M.
• Is Part Of: International journal of high performance computing and networking. Volume 1:Number 1/2/3(2004)
• Page Start: 4
• Page End: 16
• Publication Date: 2005-08-08
• Subjects: DSP -- VLIW processors -- instruction level scheduling -- low power consumption -- very long instruction word architectures -- energy minimisation -- energy consumption -- energy reduction -- embedded systems -- high performance computing -- digital signal processing; High performance computing -- Periodicals; Computer networks -- Periodicals; High performance computing; Periodicals; 004.05
• Languages: English
• ISSNs: 1740-0562

Abstract

Switching activity and schedule length are the two most important factors that influence the energy consumption of an application executed on a VLIW (very long instruction word) processor. Considering these two factors together, we propose an instruction-level energy-minimisation scheduling technique to reduce the energy consumption of applications on VLIW processors. We first formally prove that this problem is NP-complete. Then three heuristic algorithms, MSAS, MLMSA, and EMSA, are proposed. While switching activity and schedule length are given higher priority in MSAS and MLMSA respectively, EMSA gives the best result considering both of them. The experimental results show that EMSA gives a 31.7% reduction in energy compared with the traditional list scheduling approach on average.