Electromigration-aware dynamic routing algorithm for network-on-chip applications. (19th January 2011)

• Record Type: Journal Article
• Authors: Hosseini, Amir; Shabro, Vahid
• Is Part Of: International journal of high performance systems architecture. Volume 3:Number 1(2011)
• Page Start: 56
• Page End: 63
• Publication Date: 2011-01-19
• Subjects: network-on-chip -- NoC -- electromigration aware design -- dynamic routing -- bidirectional link -- on chip interconnection -- deadlock free -- livelock free; Computer architecture -- Periodicals; Computer systems -- Periodicals; High performance computing -- Periodicals; 004.205
• Languages: English
• ISSNs: 1751-6528

Abstract

We present an electromigration-aware dynamic routing algorithm, EMARA, for network-on-chip (NoC) applications that has the ability to eliminate the electromigration effects in order to increase the lifetime of SoCs. We formulate the expected lifetime of the NoC system based on the electromigration phenomenon as a function of the bidirectional link load. We introduce the concept of void packet to help in balancing the link load in the case of severe unbalanced condition. We investigate the trade off between the expected system boosted lifetime using EMARA and the network performance measured by average packet latency and power consumption. By utilising bidirectional balanced data transfer, our algorithm increases the expected system's lifetime by two to six orders of magnitude compared with other XY-based dynamic routing algorithms. Simulation results demonstrate that EMARA can achieve more than two orders of magnitude improvement in expected system's lifetime, independently of both traffic pattern and injection rate, with only 1.14% and 4% increase in power consumption and average packet latency, respectively.