A massively parallel hardware architecture for ray-tracing. (11th December 2009)

• Record Type: Journal Article
• Authors: Nery, A.S.; Nedjah, N.; Franca, F.M.G.
• Is Part Of: International journal of high performance systems architecture. Volume 2:Number 1(2009)
• Page Start: 26
• Page End: 34
• Publication Date: 2009-12-11
• Subjects: ray tracing -- hardware architecture -- parallelism -- computer graphics -- FPGA -- non-interactive rendering -- spatial data structure -- regular grids; Computer architecture -- Periodicals; Computer systems -- Periodicals; High performance computing -- Periodicals; 004.205
• Languages: English
• ISSNs: 1751-6528

Abstract

Real time performance of non-interactive rendering of three-dimensional scenes is usually unachievable. Ray tracing is one of the methods used for rendering such scenes. The performance achieved by a sequential software-based implementation of ray tracing is far from satisfactory. In contrast, many parallel implementations of ray tracing have been enabling real time performance, as the underlying algorithm can be massively parallelised. Thus, it is expected that a custom parallel design in hardware is likely to achieve the acceptable performance standards. In this paper, we propose a hardware architecture, which we call GridRT, capable of dealing with the main desirable features of ray tracing, such as shadows and reflections effects, imposing low requirements in terms of silicon area while achieving acceptable performance in terms of rendering time. This architecture achieves is efficient yet compact as it explores the massive parallelism offered by the intrinsic structure of the algorithm. The design exploits the usage the spatial data structure of regular grids.