A methodology for validation of microprocessors using symbolic simulation. (27th January 2006)

• Record Type: Journal Article
• Authors: Mishra, Prabhat; Dutt, Nikil; Krishnamurthy, Narayanan; Abadir, Magdy
• Is Part Of: International journal of embedded systems. Volume 1:Number 1/2(2005)
• Page Start: 14
• Page End: 22
• Publication Date: 2006-01-27
• Subjects: processor validation -- symbolic simulation -- microprocessors -- hardware synthesis -- architecture description language -- microprocessor design -- top-down validation -- language-based specification -- reference models; Embedded computer systems -- Periodicals; 004.16
• Languages: English
• ISSNs: 1741-1068

Abstract

Functional validation is one of the most complex and expensive tasks in the current processor design methodology. A significant bottleneck in the validation of processors is the lack of a golden reference model. Thus, many existing approaches employ a bottom-up methodology by using a combination of simulation techniques and formal methods. We present a top-down validation approach using a language-based specification. The specification is used to generate the necessary reference models for processor validation using symbolic simulation. We applied our methodology for property checking as well as equivalence checking of microprocessors.