Light-bias coupling erase process for non-volatile zinc tin oxide TFT memory with a nickel nanocrystals charge trap layer. (11th February 2016)

• Record Type: Journal Article
• Authors: Li, Jeng-Ting; Liu, Li-Chih; Ke, Po-Hsien; Chen, Jen-Sue; Jeng, Jiann-Shing
• Is Part Of: Journal of physics. Volume 49:Number 11(2016)
• Publication Date: 2016-02-11
• Subjects: charge trapping memory -- ZTO -- solution process -- thin film transistor; Physics -- Periodicals; 530
• DOI: 10.1088/0022-3727/49/11/115104
• Languages: English
• ISSNs: 0022-3727

Abstract

Abstract: A nonvolatile charge trapping memory is demonstrated on a thin film transistor (TFT) using a solution processed ultra-thin (~7 nm) zinc tin oxide (ZTO) semiconductor layer with an Al2 O3 /Ni-nanocrystals (NCs)/SiO2 dielectric stack. A positive threshold voltage ( V TH ) shift of 7 V is achieved at gate programming voltage of 40 V for 1 s but the state will not be erased by applying negative gate voltage. However, the programmed V TH shift can be expediently erased by applying a gate voltage of −10 V in conjunction with visible light illumination for 1 s. It is found that the sub-threshold swing (SS) deteriorates slightly under light illumination, indicating that photo-ionized oxygen vacancies ( and/or ) are trapped at the interface between Al2 O3 and ZTO, which assists the capture of electrons discharged from the Ni NCs charge trapping layer. The light-bias coupling action and the role of ultra-thin ZTO thickness are discussed to elucidate the efficient erasing mechanism.