Low jitter guaranteed-rate communications for cluster computing systems. (11th September 2008)

• Record Type: Journal Article
• Authors: Szymanski, Ted H.; Gilbert, Dave
• Is Part Of: International journal of communication networks and distributed systems. Volume 1:Number 2(2008)
• Page Start: 140
• Page End: 160
• Publication Date: 2008-09-11
• Subjects: low latency networks -- high bandwidth networks -- switching -- scheduling -- low jitter -- guaranteed rate communications -- cluster computing -- stochastic matrix decomposition -- quality of service -- QoS -- guaranteed bandwidth -- buffer space -- supercomputing -- network-on-a-chip; Computer networks -- Periodicals; Telecommunication systems -- Periodicals; Electronic data processing -- Distributed processing -- Periodicals; 004.6
• Languages: English
• ISSNs: 1754-3916

Abstract

Low latency high bandwidth networks are key components in large scale computing systems. Existing systems use dynamic algorithms for routing and scheduling cell transmissions through switches. Due to stringent time requirements, dynamic algorithms have suboptimal performances, which limit throughputs to well below peak capacity. It is shown that Guaranteed-Rate communications can be supported over switch-based networks with 100% throughput and very low delay jitter, provided that each switch has the capacity to buffer a small number of cells per flow. An algorithm is used to reserve guaranteed bandwidth and buffer space in the switches, resulting in the specification of a doubly stochastic traffic rate matrix for each switch. Each switch schedules the Guaranteed-Rate traffic for transmission according to a resource reservation algorithm based on Recursive Fair Stochastic Matrix Decomposition. Very low delay jitters can be achieved among all simultaneous flows while simultaneously achieving 100% throughput in each switch. When receive buffers of bounded depth are used to filter residual network jitter at the destinations, end-to-end traffic flows can be delivered with essentially zero delay jitter. The algorithm is suitable for the switch-based networks found in commercial supercomputing systems such as Fat Trees, and for silicon Networks-on-a-Chip.