Performance Comparison of Sigma-delta Modulator Architectures for MEMS Accelerometers Using a Fully-Digital Approach. (2016)

• Record Type: Journal Article
• Authors: Lima, V.; Brito, N.; Alves, F.S.; Cabral, J.; Gaspar, J.; Rocha, L.A.
• Is Part Of: Procedia engineering. Volume 168(2016)
• Page Start: 814
• Page End: 817
• Publication Date: 2016
• Subjects: Sigma-delta modulator -- MEMS accelerometer -- FPGA ;; Engineering -- Congresses; Engineering -- Periodicals; Engineering; Conference proceedings; Periodicals; 620.005
• DOI: 10.1016/j.proeng.2016.11.280
• Languages: English
• ISSNs: 1877-7058

Abstract

Abstract: A comparison between different architectures of electromechanical sigma-delta modulators applied to MEMS accelerometers is presented here. Several modulation orders (2 nd to 5 th ) and respective gains can be selected, and controlled in real-time, and sensitivity and noise levels have been measured for demonstration of the system on a SOI (25μm thick active layer) fabricated accelerometer. The fully digital configurable sigma-delta modulator was implemented in a FPGA (Field-programmable gate array), enabling a fine tuning of the gains for each architecture, in a very short time, using automated scripting. All the tests presented here were realized with a sampling frequency of 454kHz, with 15 bits of resolution and a decimation ratio of 454 (bandwidth of 1kHz). Best noise figures (63μg/√Hz), as expected, are achieved for a 5 th order implementation.