Dynamics, Design, and Application of a Silicon-on-Insulator Technology Based Neuron. (8th June 2018)

• Record Type: Journal Article
• Authors: Dutta, S.; Chavan, T.; Shukla, S.; Kumar, V.; Shukla, A.; Mohapatra, N.; Ganguly, U.
• Is Part Of: MRS advances. Volume 3:Number 57/58(2018)
• Page Start: 3347
• Page End: 3357
• Publication Date: 2018-06-08
• Subjects: electrical properties, -- Si; Electrical engineering -- Congresses; Physics -- Congresses; Materials -- Research -- Congresses; Materials science -- Congresses; 620.11
• DOI: 10.1557/adv.2018.490
• Languages: English
• ISSNs: 2059-8521

Abstract

Abstract: Spiking Neural Networks propose to mimic nature's way of recognizing patterns and making decisions in a fuzzy manner. To develop such networks in hardware, a highly manufacturable technology is required. We have proposed a silicon-based leaky integrate and fire (LIF) neuron, on a sufficiently matured 32 nm CMOS silicon-on-insulator (SOI) technology. The floating body effect of the partially depleted (PD) SOI transistor is used to store "holes" generated by impact ionization in the floating body, which performs the "integrate" function. Recombination or equivalent hole loss mimics the "leak" functions. The "hole" storage reduces the source barrier to increase the transistor current. Upon reaching a threshold current level, an external circuit records a "firing" event and resets the SOI MOSFET by draining all the stored holes. In terms of application, the neuron is able to show classification problems with reasonable accuracy. We looked at the effect of scaling experimentally. Channel length scaling reduces voltage for impact ionization and enables sharper impact ionization producing significant designability of the neuron. A circuit equivalence is also demonstrated to understand the dynamics qualitatively. Three distinct regimes are observed during integration based on different hole leakage mechanism.