Balancing task- and data-level parallelism to improve performance and energy consumption of matrix computations on the Intel Xeon Phi. (August 2015)

• Record Type: Journal Article
• Authors: Dolz, Manuel F.; Igual, Francisco D.; Ludwig, Thomas; Piñuel, Luis; Quintana-Ortí, Enrique S.
• Is Part Of: Computers & electrical engineering. Volume 46(2015)
• Page Start: 95
• Page End: 111
• Publication Date: 2015-08
• Subjects: Power-aware computing -- High performance -- Many-core architectures -- Runtime task schedulers -- Dense linear algebra; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2015.06.009
• Languages: English
• ISSNs: 0045-7906

Abstract

Abstract: The emergence of new manycore architectures, such as the Intel Xeon Phi, poses new challenges in how to adapt existing libraries and applications to this type of systems. In particular, the exploitation of manycore accelerators requires a holistic solution that simultaneously addresses time-to-response, energy efficiency and ease of programming. In this paper, we adapt the SuperMatrix runtime task scheduler for dense linear algebra algorithms to the many-threaded Intel Xeon Phi, with special emphasis on the performance and energy profile of the solution. From the performance perspective, we optimize the balance between task- and data-parallelism, reporting notable results compared with Intel MKL. From the energy-aware point of view, we propose a methodology that relies on core-level event counters and aggregated power consumption samples to obtain a task-level accounting for the energy. In addition, we introduce a blocking mechanism to reduce power and energy consumption during the idle periods inherent to task parallel executions.