Energy-optimal configuration selection for manycore chips with variation. (September 2017)

• Record Type: Journal Article
• Authors: Langer, Akhil; Totoni, Ehsan; Palekar, Udatta; Kalé, Laxmikant V
• Other Names: Balaji Pavan guest-editor.; Huang Zhiyi guest-editor.
• Is Part Of: International journal of high performance computing applications. Volume 31:Number 5(2017)
• Page Start: 451
• Page End: 466
• Publication Date: 2017-09
• Subjects: energy -- power -- optimization -- multicore chips -- low-voltage computing -- near-threshold voltage computing -- process variation -- heterogeneity -- integer programming -- quadratic integer programming; High performance computing -- Periodicals; Supercomputers -- Periodicals; 004.1105
• DOI: 10.1177/1094342016672082
• Languages: English
• ISSNs: 1094-3420

Abstract

Operating chips at high energy efficiency is one of the major challenges for modern large-scale supercomputers. Low-voltage operation of transistors increases the energy efficiency but leads to frequency and power variation across cores on the same chip. Finding energy-optimal configurations for such chips is a hard problem. In this work, we study how integer linear programming techniques can be used to obtain energy-efficient configurations of chips that have heterogeneous cores. Our proposed methodologies give optimal configurations as compared with competent but sub-optimal heuristics while having negligible timing overhead. The proposedParSearch method gives up to 13.2% and 7% savings in energy while causing only 2% increase in execution time of two HPC applications: miniMD and Jacobi, respectively. Our results show that integer linear programming can be a very powerful online method to obtain energy-optimal configurations.