A compact implementation of a negative switched-capacitor voltage regulator dedicated to body-biasing of CMOS circuits. (February 2017)

• Record Type: Journal Article
• Authors: Souvignet, Thomas; Allard, Bruno; Mas, Alexandre
• Is Part Of: Microelectronics journal. Volume 60(2017)
• Page Start: 13
• Page End: 20
• Publication Date: 2017-02
• Subjects: Body-biasing -- Switched capacitor circuits -- Closed loop systems; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2016.11.016
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: A fully integrated negative voltage regulator dedicated to body-biased circuits in FDSOI is proposed and validated through simulation. The regulator comprises an original negative switched-capacitor converter with a frequency modulation control loop. It can be digitally programmed by step of 100 mV in 100 μs time-scale from 100 mV to 1.3 V of negative voltage. The maximum overall power consumption is 20 μA to drive 1 mm 2 of digital load. Abstract : Highlights: Fully depleted Silicon-On-Insulator technology offers the option of back-biasing. Back-biasing improves transistors' performances. A converter is required to generate a negative voltage from the top positive voltage. A switch-mode converter is required for the sake of efficiency. An original switched-capacitor topology is verified through simulation.