Impact of work function of the silicon bottom-gates on electrical instability in InGaZnO thin film transistors. (September 2016) - Jang, Hyun Jun; Yu, Chong Gun; Park, Jong Tae
Abstract: The electrical instability in amorphous InGaZnO (IGZO) thin film transistors has been investigated for different doping types and concentrations of silicon bottom-gates. The gate current (IG ) was measured to prove that the threshold voltage shifts (∆ VTH ) were due to electron and hole trapped charges under positive and negative gate stress, respectively. After the gate stress, the ∆ VTH in IGZO transistors depend on the work function of the silicon gates. The ∆ VTH listed in order of magnitude are ∆VTH-n +-gate > ∆ VTH-n-gate > ∆ VTH-p-gate > ∆ VTH-p +-gate after a positive gate stress and a positive thermal illumination stress, but this is reversed after a negative gate stress and a negative thermal illumination stress. The more significant ∆ VTH after a negative thermal illumination stress than after positive thermal illumination stress may be attributed to the low-level injection under light illumination. To minimize ∆ VTH in IGZO transistor with a silicon bottom-gate, a low-doped gate is recommended. Highlights: Investigation on instability in a-InGaZnO TFTs with different doping types and concentrations of Si bottom-gates The device instability is inversely related to the work function of the silicon gates under PBS condition. The device instability is proportional to the work function of the silicon gates under NBS condition.