Effect of interface and bulk traps on the C–V characterization of a LPCVD-SiNx/AlGaN/GaN metal-insulator-semiconductor structure. (28th April 2016) - Bao, Qilong; Huang, Sen; Wang, Xinhua; Wei, Ke; Zheng, Yingkui; Li, Yankui; Yang, Chengyue; Jiang, Haojie; Li, Junfeng; Hu, Anqi; Yang, Xuelin; Shen, Bo; et al.
Abstract: Silicon nitride (SiNx ) film grown by low-pressure chemical vapor deposition (LPCVD) is utilized as a gate dielectric for AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs). Trap distribution at the gate-dielectric/III-nitrides interface is characterized by a temperature-dependent ac-capacitance technique. The extracted interface state density D it decreases from 2.92 × 10 13 to 1.59 × 10 12 cm −2 eV −1 as the energy level depth ( E C - E T ) increases from 0.29 to 0.50 eV, and then levels off to E C - E T = 0.80 eV. Capacitance-mode deep level transient spectroscopy (C-DLTS) and energy band diagram simulations reveal that deep levels with E C - E T > 0. 83 eV are responsible for the dispersion of capacitances at high temperature (>125 °C) and low frequencies (<1 kHz). A high-resolution transmission electron microscope (TEM) reveals that re-oxidation of the RCA-treated AlGaN barrier surface may be responsible for the relatively high density of shallow states at the LPCVD-SiNx /III-nitride interface.