Reliability study of organic complementary logic inverters using constant voltage stress. (November 2015) - Wrachien, N.; Cester, A.; Lago, N.; Rizzo, A.; D'Alpaos, R.; Stefani, A.; Turatti, G.; Muccini, M.; Meneghesso, G.
Abstract: We performed constant voltage stresses with different bias conditions on all-organic complementary inverters. We found a 20% maximum variation of DC inverter parameters after a 10 4 -s stress. However, the largest stress-induced degradation was found in the delay times, which increased by a factor as high as 7. This is mainly due to the threshold voltage variation of the p-type thin-film-transistor and the mobility reduction of the n-type thin-film transistors, which both decrease the saturation drain current.