84% High efficiency dynamic voltage scaler with nano-second settling time based on charge-pump and BWC-DAC. (September 2018)

• Record Type: Journal Article
• Authors: Ragheb, A.N.; Kim, HyungWon; Lee, Jae-Jin
• Is Part Of: Microelectronics journal. Volume 79(2018)
• Page Start: 91
• Page End: 97
• Publication Date: 2018-09
• Subjects: Binary-weighted capacitor DAC -- Charge-pump -- Dynamic voltage scaler -- Low power -- Fast settling time -- High efficiency; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2018.06.012
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: This paper introduces an energy-efficient dynamic voltage scaler (DVS) based on charge- pump and binary-weighted capacitor digital to analog converter (BWC-DAC). Conventional DVS architectures suffer from long settling-time beside the limitation of coarse voltage resolution, so we propose DVS architecture based on BWC-DAC architecture. It takes advantage of DAC's reconfigurable structure to provide an output voltage scaled with high resolution of V IN /2 N for input voltage V IN and N configuration bits; and Nano-second transition time. However, DAC inherently suffers from low power efficiency because it requires frequent reset to maintain the output voltage. To overcome this issue, a high efficiency charge-pump is employed to restore the charges in DAC's capacitors without the need to reset which results in improved power efficiency. The proposed DVS with a 6-bit DAC and a feedback controlled circuit have been implemented using a 130 nm CMOS process. The measurement results show an accurate 64 voltage levels of the 6-bit DAC from 0 V to 1.476 V, when supplied by an input voltage of 1.5 V. We achieved a peak efficiency of 84% for load current ranging from 1 μA–14.76 μA. Furthermore, it provides an extremely short settling time that is as short as 83.6 Nano second.