Matching Discrete Signals for Hardware-in-the-Loop-Testing of PLCs. Issue 10 (2018)

• Record Type: Journal Article
• Authors: Thönnessen, David; Rakel, Stefan; Reinker, Niklas; Kowalewski, Stefan
• Is Part Of: IFAC-PapersOnLine. Volume 51:Issue 10(2018)
• Page Start: 229
• Page End: 234
• Publication Date: 2018
• Subjects: Validation -- verification -- testing -- evaluation of embedded systems -- applications -- Programmable logic controllers -- Process control -- manufacturing; Automatic control -- Periodicals; 629.805
• DOI: 10.1016/j.ifacol.2018.06.267
• Languages: English
• ISSNs: 2405-8963

Abstract

Abstract: Executing Hardware-in-the-Loop (HiL) tests means to compare the actual behavior of a System Under Test (SUT) against a specification of its desired behavior, specified by the tester. The behavior of the SUT is available in form of time- and value-discrete signals coming from the SUT's I/O-modules. The HiL simulator compares these signals to reference signals, defined by the specification. Our approach performs this comparison by matching signal pairs, i.e. matching the actual and reference signal. We apply tolerances in order to allow the actual signal to deviate from the reference without causing the test to fail.