Adaptive segmentation methodology for hardware function evaluators. (July 2018)

• Record Type: Journal Article
• Authors: Trejo-Arellano, J.M.; Vázquez Castillo, J.; Longoria-Gandara, O.; Carrasco-Alvarez, R.; Gutiérrez, C.A.; Castillo Atoche, A.
• Is Part Of: Computers & electrical engineering. Volume 69(2018)
• Page Start: 194
• Page End: 211
• Publication Date: 2018-07
• Subjects: Function approximation -- Piecewise polynomial -- Hardware optimization -- Polynomial segmentation -- Mathematical functions -- Function evaluators -- Surrogate modeling -- Particle swarm optimization; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2018.04.024
• Languages: English
• ISSNs: 0045-7906

Abstract

Abstract: This paper presents a new adaptive function segmentation methodology to evaluate mathematical functions in hardware systems through piece-wise polynomial approximation methods. In contrast to conventional segmentation techniques, this methodology automatically adjusts the segmentation strategy through a function shape analysis based on the first- and second-order derivatives. Additionally, a particle swarm optimization algorithm is implemented to search for the best segmentation parameters that satisfy the designer-given signal-to-quantization-noise ratio specification and minimize the number of polynomials. The main advantages are a significant lookup table size reduction, increased approximation accuracy of highly nonlinear sections, and the automatic generation of a hierarchy-less segmentation solution. Hence, the proposed methodology enables efficient development of hardware accelerated surrogate models such as wireless channel emulators and other signal processing applications on inexpensive platforms that rely on fixed-point number representation as a compromise between performance, and output accuracy.