A Multi-core architecture for a hybrid information system. (July 2018)

• Record Type: Journal Article
• Authors: Hamid, Norhazlina; Chang, Victor; Walters, Robert John; Wills, Gary Brian
• Is Part Of: Computers & electrical engineering. Volume 69(2018)
• Page Start: 852
• Page End: 864
• Publication Date: 2018-07
• Subjects: Multi-core architecture for a HIS system (MCAHS) -- Multi-core clusters -- Latency and message latency for clusters -- Quality, reliability and resilience (QRR) for HIS systems; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2017.12.020
• Languages: English
• ISSNs: 0045-7906

Abstract

Abstract: This paper demonstrates our proposed Multi-core architecture for a hybrid information system (HIS) with the related work, system design, theories, experiments, analysis and discussion presented. Different designs on clusters, communication between different types of chips and clusters and network queuing methods have been described. Our aim is to achieve quality, reliability and resilience and to demonstrate it, our emphasis is on latency with messages communicated in our system – understand how it happens, what can trigger its increase, and then experiment with different types of focuses, including under Store-and-Forward Flow Control method, Wormhole flow control method, cluster size and message size to get a better understanding. Our analysis allows us to reduce latency and avoid its sharp increase. We justify our research contributions, particularly in the area of "traffic analysis and management" and "performance analysis of transmission control" of the HIS systems.