An analysis framework for hardware and software implementations with applications from cryptography. (July 2018)

• Record Type: Journal Article
• Authors: Damaj, Issam; Kasbah, Safaa
• Is Part Of: Computers & electrical engineering. Volume 69(2018)
• Page Start: 572
• Page End: 584
• Publication Date: 2018-07
• Subjects: Analysis -- Hardware -- Software -- Gate arrays -- Algorithms -- Cryptography; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2017.06.008
• Languages: English
• ISSNs: 0045-7906

Abstract

Highlights: Develop a framework that combines the characteristics of algorithms and their implementations. Aid classifying, ranking, and evaluating algorithms and implementations. Provide a generic model and a specification pattern for analysis and evaluation frameworks. Validate the framework by studying a set of cryptographic ciphers. Target state-of-the-art multi-core processors and high-end FPGAs. Graphical abstract: Abstract: With the richness of present-day hardware architectures, tightening the synergy between hardware and software has attracted a great attention. The interest in unified approaches paved the way for newborn frameworks that target hardware and software co-design. This paper confirms that a unified statistical framework can successfully classify algorithms based on a combination of the heterogeneous characteristics of their hardware and software implementations. The proposed framework produces customizable indicators for any hybridization of processing systems and can be contextualized for any area of application. The framework is used to develop the Lightness Indicator System ( LIS ) as a case-study that targets a set of cryptographic algorithms that are known in the literature to be tiny and light. The LIS targets state-of-the-art multi-core processors and high-end Field Programmable Gate Arrays ( FPGAs ). The presented work includes a generic benchmark model that aids the clear presentation of the framework and extensive performance analysis and evaluation.