A survey of techniques for architecting SLC/MLC/TLC hybrid Flash memory–based SSDs. (23rd January 2018)

• Record Type: Journal Article
• Authors: Alsalibi, Ahmed Izzat; Mittal, Sparsh; Al‐Betar, Mohammed Azmi; Sumari, Putra Bin
• Is Part Of: Concurrency and computation. Volume 30:Number 13(2018)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2018-01-23
• Subjects: flash translation layer -- garbage collection -- hybrid solid state disk -- NAND flash memory -- wear leveling; Parallel processing (Electronic computers) -- Periodicals; Parallel computers -- Periodicals; 004.35
• DOI: 10.1002/cpe.4420
• Languages: English
• ISSNs: 1532-0626

Abstract

Summary: Flash memory–based solid‐state drives (SSDs) offer several attractive features and benefits compared to hard disk drive (HDD), such as shock resistance and better performance especially for random data access. Depending on the number of bits in each cell, Flash memory can be designed as single/multi/triple level cell (SLC/MLC/TLC), which have different performance, density, cost and write endurance characteristics. To bring the best of these together, several researchers have proposed designing SSD using hybrid SLC/MLC/TLC Flash memory. However, these SSDs also present several challenges such as buffer management, placement of hot/cold data in suitable portion, and intelligent garbage collection. Several recent techniques aim to address these challenges. In this paper, we present a survey of techniques for managing SSDs designed with SLC/MLC/TLC Flash memory. We classify the works on several axes to bring out their similarities and differences. We aim to synthesize the state‐of‐art progress in hybrid SSD management and also spark further research in this area.