Low-power mapping algorithm for three-dimensional network-on-chip based on diversity-controlled quantum-behaved particle swarm optimization. Issue 3 (September 2016) - Huang, Cui; Zhang, Dakun; Song, Guozhi
Three-dimensional network on chip (3D NoC) is developed based on three-dimensional integrated circuit, system on chip and two-dimensional network on chip. The 3D NoC is mainly used to solve the problems such as communication bottleneck of highly integrated chips. Mapping of 3D NoC is a key problem in the research area of 3D NoC. The authors proposed a low-power mapping algorithm based on quantum-behaved particle swarm optimization. Simulation results show that the proposed algorithm can significantly reduce power consumption, but with large-scale application characteristic graph, the efficiency of power optimization cannot be improved very much. To solve this problem, a low-power mapping algorithm for 3D NoC based on diversity-controlled quantum-behaved particle swarm optimization is proposed in this paper. Simulation results show that for large-scale application characteristic graph, this algorithm is able to maintain a stable power optimization efficiency (4.08–8.04%) and converges much faster.