Novel low-power and stable SRAM cells for sub-threshold operation at 45 nm. Issue 8 (3rd August 2018)

• Record Type: Journal Article
• Authors: Gupta, Anu; Gupta, Priya; Asati, Abhijit
• Is Part Of: International journal of electronics. Volume 105:Issue 8(2018)
• Page Start: 1399
• Page End: 1415
• Publication Date: 2018-08-03
• Subjects: SRAM -- low power -- sub-threshold -- static noise margin -- variability; Electronics -- Periodicals; Electronic control -- Periodicals; 621.381
• DOI: 10.1080/00207217.2018.1440437
• Languages: English
• ISSNs: 0020-7217

Abstract

ABSTRACT: In scaled technologies with lower supply voltage, conventional Static Random Access Memory (SRAM) cell suffers from unsuccessful read & write operation due to high off state current in sub-threshold region at nanometre technologies. This work proposes new functional low-power designs of SRAM cells with 7, 8, 9 and 12 transistors which operate at only 0.4V power supply in sub-threshold operation at 45 nm technology. Stability analysis is carried out using static noise margins as well as N-curve cell stability metrics. For performance measurement, read/write access time and leakage power consumption in hold mode are analysed. The comparison with published designs shows that two new proposed designs namely M8T, MPT8T have 30% less leakage power consumption along with 2× read stability, 2× write ability, more than 60% faster read & write operation.