A threshold voltage model of short-channel fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs with high-k dielectric*The author, Pramod Kumar Tiwari, was supported by the Science and Engineering Research Board (SERB), Department of Science and Technology, Ministry of Human Resource and Development, Government of India under Young Scientist Research (Grant No. SB/FTP/ETA-415/2012). (20th August 2015)

• Record Type: Journal Article
• Authors: Krishna Saramekala, Gopi; Dubey, Sarvesh; Kumar Tiwari, Pramod
• Is Part Of: Chinese physics B. Volume 24:Number 10(2015:Oct.)
• Publication Date: 2015-08-20
• Subjects: 85.30.Tv -- 85.30.De; recessed-source/drain (Re-S/D) -- high-k gate-material -- fringing field and SCEs; Physics -- Periodicals; Physics; Periodicals; 530.05
• DOI: 10.1088/1674-1056/24/10/108505
• Languages: English
• ISSNs: 1674-1056

Abstract

Abstract: In this paper, a surface potential based threshold voltage model of fully-depleted (FD) recessed-source/drain (Re-S/D) silicon-on-insulator (SOI) metal-oxide semiconductor field-effect transistor (MOSFET) is presented while considering the effects of high- k gate-dielectric material induced fringing-field. The two-dimensional (2D) Poisson's equation is solved in a channel region in order to obtain the surface potential under the assumption of the parabolic potential profile in the transverse direction of the channel with appropriate boundary conditions. The accuracy of the model is verified by comparing the model's results with the 2D simulation results from ATLAS over a wide range of channel lengths and other parameters, including the dielectric constant of gate-dielectric material.