Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al2O3 Passivation Layer and Forming Gas Annealing. (19th February 2018)

• Record Type: Journal Article
• Authors: Jiang, Shanshan; He, Gang; Liu, Mao; Zhu, Li; Liang, Shuang; Li, Wendong; Sun, Zhaoqi; Tian, Mingliang
• Is Part Of: Advanced Electronic Materials. Volume 4:Number 4(2018)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2018-02-19
• Subjects: electrical properties -- forming gas annealing -- high‐k gate dielectrics -- interface chemistry -- metal‐oxide‐semiconductor capacitors; Materials -- Electric properties -- Periodicals; Materials science -- Periodicals; Magnetic materials -- Periodicals; Electronic apparatus and appliances -- Periodicals; 537
• DOI: 10.1002/aelm.201700543
• Languages: English
• ISSNs: 2199-160X

Abstract

Abstract: Metal‐oxide‐semiconductor (MOS) capacitors with sputtering‐deposited Gd‐doped HfO2 (HGO) high k gate dielectric thin films and ALD‐derived Al2 O3 interfacial passivation layer were fabricated on GaAs substrates. The effects of the passivation layer and the forming gas annealing (FGA) temperature were explored by studying the interfacial chemical bonding states and electrical properties of HGO/GaAs and HGO/Al2 O3 /GaAs gate stacks via x‐ray photoelectron spectroscopy (XPS), capacitance‐voltage ( C–V ), and leakage current density‐voltage ( J–V ) measurements. Results indicated that the MOS capacitors performances were enhanced by performing FGA. The electrical analysis revealed that the 300 °C‐annealed Al/HGO/GaAs/Al MOS capacitor with 20 cycles Al2 O3 passivation layer experienced improved electrical properties, with a dielectric constant of 44, a flat band voltage of 0.64 V, a hysteresis of 0.02 V corresponding to the oxide charge density of −6.2 × 10 12 cm 2, border trapped oxide charge density of −3.02 × 10 11 cm 2, a leakage current density 5.87 × 10 ‐6 A/cm 2 at a bias voltage of 2 V. The low temperature (77–300 K) dependent detailed current conduction mechanisms (CCMs) of the 300 °C‐annealed MOS capacitor at low temperatures were also systematically investigated. The optimized interface chemistry and the excellent electrical properties suggested that HGO/Al2 O3 /GaAs potential gate stacks could be applied in future III‐V‐based MOSFET devices. Abstract : By using ALD‐derived Al2 O3 passivation layer and forming gas annealing processing, the interface chemistry, electrical properties, and leakage current mechanism at low temperature for HfGdO/GaAs gate stacks are investigated systematically. The amazing results indicate the application of HfGdO/Al2 O3 /GaAs as potential dielectric candidates in future III‐V‐based metal‐oxide‐semiconductor field effect transistor devices.