Floating-gate controlled programmable non-volatile black phosphorus PNP junction memory. Issue 7 (31st January 2018) - Zhang, Pengfei; Li, Dong; Chen, Mingyuan; Zong, Qijun; Shen, Jun; Wan, Dongyun; Zhu, Jingtao; Zhang, Zengxing
Abstract : By designing and tailoring the structure of the floating gate, a special floating-gate field-effect transistor configuration has been proposed for the design of programmable non-volatile black phosphorus PNP junction memory. Abstract : To meet the increasing requirements of minimizing circuits, the development of novel device architectures that use ultra-thin two-dimensional materials is encouraged. Here, we demonstrate a non-volatile black phosphorus (BP) PNP junction in a BP/h-BN/graphene heterostructure in which BP acts as a transport channel layer, hexagonal boron nitride (h-BN) serves as a tunnel barrier layer and graphene is the charge-trapping layer. The device architecture is designed such that only the middle part of the BP is aligned over the graphene flake, enabling the flexible tuning of the charge carriers in the BP over the graphene charge-trapping layer. Thus, the device exhibits the ability to work in two different operating modes (PNP and PP + P). Each operating mode can be retained well and demonstrates non-volatile behavior, and each can be programmed by using the control-gate.