An energy-efficient fault-aware core mapping in mesh-based network on chip systems. (1st March 2018)

• Record Type: Journal Article
• Authors: Beechu, Naresh Kumar Reddy; Moodabettu Harishchandra, Vasantha; Yernad Balachandra, Nithin Kumar
• Is Part Of: Journal of network and computer applications. Volume 105(2018)
• Page Start: 79
• Page End: 87
• Publication Date: 2018-03-01
• Subjects: Network on chip (NoC) -- Core -- Node average distance -- Placing unmapped vertices region -- Failure rate; Microcomputers -- Periodicals; Computer networks -- Periodicals; Application software -- Periodicals; Micro-ordinateurs -- Périodiques; Réseaux d'ordinateurs -- Périodiques; Logiciels d'application -- Périodiques; Application software; Computer networks; Microcomputers; Periodicals; 004.05; 004
• DOI: 10.1016/j.jnca.2017.12.019
• Languages: English
• ISSNs: 1084-8045

Abstract

Abstract: A fault aware core mapping on Network on Chip (NoC) requires an understanding the calculation of the functional metrics. The functional metrics are Node Average Distance (NAD), Placing unmapped Vertices Region (PVR) and Weighted Communication Energy(WCE). The traditional method of calculating functional metrics are using unmapped cores, distance and weight. However finding the exact values of the functional metrics is not always easy, particularly when busy cores and failed cores are mapped in the middle of available cores. This paper proposes an energy efficient fault aware core mapping algorithm that maps the cores onto the NoC under communication rate constraints to minimize the total communication energy using functional metrics. The simulation results show that proposed mapping algorithm has higher performance over BMAP, PMAP and NMAP algorithm present in literature by 25%, 42%, and 65% under single fault, 30%, 40%, and 60% under two faults and 40%, 44%, and 55% under four faults respectively.