A novel biasing technique for low phase noise voltage controlled oscillators. (February 2018)

• Record Type: Journal Article
• Authors: Albittar, Ihsan F.I.; Dogan, Hakan; Ozgun, Mehmet T.
• Is Part Of: Microelectronics journal. Volume 72(2018)
• Page Start: 120
• Page End: 125
• Publication Date: 2018-02
• Subjects: Oscillators -- VCO -- PLL -- Phase noise; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2017.12.002
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: This paper proposes a new biasing technique for LC-based voltage controlled oscillators to improve the phase noise performance while ensuring the current variations to be within an acceptable range. The proposed technique uses a feedback loop and a LDO to generate, sense, and regulate the output current. The oscillator has 33.3% tuning range around a center frequency of 2.4 GHz. The proposed design achieves −127.2 dBc/Hz phase noise at 1 MHz offset from 2.25 GHz while consuming 3.36 mA from a 3.3-V supply. The circuit was implemented in 65 nm UMC CMOS process. The results show that the circuit has F o M of −183.8 dBc/Hz and F o M T of −194.5 dBc/Hz at 1 MHz offset, and the current variation across PVT is within +68 µA to −63 µA range.