A Hybrid Hardware Implementation for Nonlinear Model Predictive Control. Issue 23 (2015)

• Record Type: Journal Article
• Authors: Peyrl, Helfried; Ferreau, Hans Joachim; Kouzoupis, Dimitris
• Is Part Of: IFAC-PapersOnLine. Volume 48:Issue 23(2015)
• Page Start: 87
• Page End: 93
• Publication Date: 2015
• Subjects: nonlinear MPC -- embedded optimization -- field programmable gate array -- SoC; Automatic control -- Periodicals; 629.805
• DOI: 10.1016/j.ifacol.2015.11.266
• Languages: English
• ISSNs: 2405-8963

Abstract

Abstract: Model predictive control (MPC) is nowadays considered a viable approach for high-speed control applications that require the controller to run autonomously on resourceconstrained computing devices. Many different types of such embedded devices exist allowing practitioners to trade-off performance, hardware cost, power consumption and other properties. This paper investigates the possibility to deploy a nonlinear MPC controller on a Xilinx Zynq- 7000 All Programmable System on Chip, which features a dual-core ARM processor and a field-programmable gate array (FGPA). We propose a specific choice of numerical algorithms that appears particularly suited for making best use of the hardware configuration at hand. Several variants of the proposed hybrid hardware implementation are compared to a naive deployment of the nonlinear MPC scheme on a single core of the CPU. Numerical experiments indicate that tailoring the NMPC scheme to exploit the advantages of both the CPU and the FPGA can considerably reduce both overall computation time and the feedback delay.