Structural, compositional and electrical characterization of Si-rich SiOx layers suitable for application in light sensors. (September 2015) - Herrera, R.; Curiel, M.; Arias, A.; Nesheva, D.; Nedev, N.; Manolov, E.; Dzhurkov, V.; Perez, O.; Valdez, B.; Mateos, D.; Bineva, I.; de la Cruz, W.; et al.
Abstract: Metal-Oxide-Silicon (MOS) structures containing silicon nanoparticles (SiNPs) in three different gate dielectrics, single SiO x layer (c-Si/SiNPs-SiO x ), two-region (c-Si/thermal SiO x /SiNPs-SiO x ) or three-region (c-Si/thermal SiO2 /SiNPs-SiO x /SiO2 ) oxides, were prepared on n -type (100) c-Si wafers. The silicon nanoparticles were grown by a high temperature furnace annealing of sub-stoichiometric SiO x films ( x =1.15) prepared by thermal vacuum evaporation technique. Annealing in N2 at 700 or 1000 °C leads to formation of amorphous or crystalline SiNPs in a SiO x amorphous matrix with x =1.8 or 2.0, respectively. The three-region gate dielectric (thermal SiO2 /SiNPs-SiO2 /SiO2 ) was prepared by a two-step annealing of c-Si/thermal SiO2 /SiO x structures at 1000 °C . The first annealing step was carried out in an oxidizing atmosphere while the second one was performed in N2 . Cross-sectional Transmission Electron Microscopy and X-ray Photoelectron Spectroscopy have proven both the nanoparticle growth and the formation of a three region gate dielectric. Annealed MOS structures with semitransparent aluminum top electrodes were characterized electrically by current/capacitance–voltage measurements in dark and under light illumination. A strong variation of the current at negative gate voltages on the light intensity has been observed in the control and annealed at 700 °C c-Si/SiNPs-SiO x /Al structures. The obtained results indicate that MOS structures with SiO1.15 gate dielectric have potential for application in light sensors in the NIR–Visible Light–UV range.