Design and simulation of electrostatic NEMS logic gates. Issue 1 (2nd January 2018)

• Record Type: Journal Article
• Authors: Pandiyan, P.; Uma, G.; Umapathy, M.
• Is Part Of: Compel. Volume 37:Issue 1(2018)
• Page Start: 2
• Page End: 28
• Publication Date: 2018-01-02
• Subjects: Finite element simulation -- Cantilever -- Coventorware -- Electrostatic actuator -- Logic gates -- NEMS switches; Electrical engineering -- Data Processing -- Periodicals; Electrical engineering -- Mathematics -- Periodicals; Electrical engineering -- Periodicals; Electronics -- Data Processing -- Periodicals; Electronics -- Mathematics -- Periodicals; 621.3
• DOI: 10.1108/COMPEL-12-2016-0544
• Languages: English
• ISSNs: 0332-1649

Abstract

Abstract : Purpose: This paper aims to present a design and simulation of electrostatic nanoelectromechanical system (NEMS)-based logic gates using laterally actuated cantilever with double-electrode structure that can implement logic functions, similar to logic devices that are made of solid-state transistors which operates at 5 V. Design/methodology/approach: The analytical modeling of NEMS switch is carried out for finding the pull-in and pull-out voltage based on Euler-Bernoulli's beam theory, and its numerical simulation is performed using finite element method computer-aided design tool COVENTORWARE. Findings: This paper reports analytical and numerical simulation of basic NEMS switch to realize the logic gates. The proposed logic gate operates on 5 V which suits well with conventional complementary metal oxide semiconductor (CMOS) logic which in turn reduces the power consumption of the device. Originality/value: The proposed logic gates use a single bit NEMS switch per logic instead of using 6-14 individual transistors as in CMOS. One exclusive feature of this proposed logic gates is that the basic NEMS switch is structurally modified to function as specific logic gates depending upon the given inputs.