10‐Channel Mode (de)multiplexer with Dual Polarizations. Issue 1 (17th November 2017) - Dai, Daoxin; Li, Chenlei; Wang, Shipeng; Wu, Hao; Shi, Yaocheng; Wu, Zhihang; Gao, Shiming; Dai, Tingge; Yu, Hui; Tsang, Hon‐Ki
Abstract: A dual‐polarization 10‐channel mode (de)multiplexer is proposed and realized with cascaded dual‐core adiabatic tapers on a silicon‐on‐insulator (SOI) platform. The mode demultiplexer has a 2.3 μm‐wide multimode bus waveguide, which supports six mode‐channels of TE polarization and four mode‐channels of TM polarization. These ten mode‐channels are (de)multiplexed with five cascaded dual‐core adiabatic tapers based on SOI nanowires. The widths for these dual‐cores are chosen optimally according to the dispersion curves of the dual‐core SOI nanowire, so that the desired highest‐order modes of TE‐ and TM‐polarizations are extracted simultaneously. These two extracted mode‐channels are coupled very efficiently to the fundamental modes of TE‐ and TM‐polarizations (TE0 and TM0 ) in the narrow waveguide, respectively, which are then separated by using a polarization beam splitter based on bent directional couplers. A chip consisting of a pair of 10‐channel mode (de)multiplexers is fabricated and then tested with data transmission of 30Gbps/channel. The measurement results show that all TM‐ and TE mode‐channels have low crosstalks (–15∼–25 dB) and low excess losses (0.2∼1.8 dB) over a broad wavelength band of ∼90 nm, which makes it WDM (wavelength‐division‐multiplexing)‐compatible and thus suitable for high capacity on‐chip optical interconnects. Abstract : A 10‐channel mode (de)multiplexer with dual polarizations is proposed and realized with cascaded dual‐core adiabatic tapers on a silicon‐on‐insulator (SOI) platform.