Analysis and design of LC oscillators associated with frequency multipliers: a phase noise perspective. (10th July 2017)

• Record Type: Journal Article
• Authors: Cabrera, D.; Begueret, JB.; Mazouffre, O.; Tesson, O.; Gamand, P.
• Is Part Of: International journal of circuit theory and applications. Volume 45:Number 12(2017:Dec.)
• Page Start: 2017
• Page End: 2033
• Publication Date: 2017-07-10
• Subjects: oscillator -- millimeter wave -- LO generation -- injection locked oscillator -- VCO -- frequency multiplication -- phase noise -- tuning range; Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.2369
• Languages: English
• ISSNs: 0098-9886

Abstract

Summary: When a local oscillator signal generation system is based on an LC oscillator and a frequency multiplier, the question of determining the optimal multiplication factor is a key issue. In this paper, the problem is addressed in order to minimize the 1/ f 2 phase noise within a tuning range constraint. The analysis, with a practical graphical representation, reveals the oscillator phase noise dependence on the oscillating frequency in the transition from two different regimes, named the inductor‐limited quality factor and the capacitor‐limited quality factor. The results obtained enable the evaluation of the phase noise performance of systems based on a sub‐harmonic and super‐harmonic oscillators and how they compare with an oscillator in the fundamental mode. Crucial questions like the phase noise improvement that these systems can achieve are analytically answered. A design methodology is thus proposed and verified through measurements on a frequency source at 31 GHz, composed by a sub‐harmonic voltage‐controlled oscillator followed by an injection‐locked frequency tripler, dedicated to backhauling applications, designed on a BiCMOS process technology. The tuning range is 10%, and the phase noise at a 1‐MHz offset is −112 dBc/Hz. Copyright © 2017 John Wiley & Sons, Ltd. Abstract : When signal generation systems are based on LC oscillator and frequency multiplier, the question of determining the optimal multiplication factor to minimize the 1/ f 2 phase noise is a key issue. The presented results enable evaluation of phase noise performance and how it can be compared with a fundamental mode oscillator. Crucial questions like the phase noise improvement that can be achieved are analytically answered, and a practical realization in a BiCMOS technology at 31 GHz shows state‐of‐the‐art results (−112 dBc/Hz at 1 MHz).