A novel gate and drain engineered charge plasma tunnel field-effect transistor for low sub-threshold swing and ambipolar nature. (December 2016) - Yadav, Dharmendra Singh; Raad, Bhagwan Ram; Sharma, Dheeraj
Abstract: In this paper, we focus on the improvement of figures of merit for charge plasma based tunnel field-effect transistor (TFET) in terms of ON-state current, threshold voltage, sub-threshold swing, ambipolar nature, and gate to drain capacitance which provides better channel controlling of the device with improved high frequency response at ultra-low supply voltages. Regarding this, we simultaneously employ work function engineering on the drain and gate electrode of the charge plasma TFET. The use of gate work function engineering modulates the barrier on the source/channel interface leads to improvement in the ON-state current, threshold voltage, and sub-threshold swing. Apart from this, for the first time use of work function engineering on the drain electrode increases the tunneling barrier for the flow of holes on the drain/channel interface, it results into suppression of ambipolar behavior. The lowering of gate to drain capacitance therefore enhanced high frequency parameters. Whereas, the presence of dual work functionality at the gate electrode and over the drain region improves the overall performance of the charge plasma based TFET. Highlights: Proposed work uses drain and gate work function engineering on the charge plasma tunnel field effect transistor. The use of gate work function engineering by creating a section of lower work function of gate electrode near to channel/source interface provides the steeper subthreshold slope; improve ON-state current and significant reduction in threshold voltage. The drain work function engineering by creating a section of relatively higher work function near to channel region of the drain terminal which is used to induce the N+ region widens the lateral tunneling distance on the drain/channel interface to prevent the flow of holes on the same junction. This provides lower gate to drain capacitance results in better channel controlling and improved high frequency figure of merit.