A High‐On/Off‐Ratio Floating‐Gate Memristor Array on a Flexible Substrate via CVD‐Grown Large‐Area 2D Layer Stacking. Issue 44 (26th September 2017)

• Record Type: Journal Article
• Authors: Vu, Quoc An; Kim, Hyun; Nguyen, Van Luan; Won, Ui Yeon; Adhikari, Subash; Kim, Kunnyun; Lee, Young Hee; Yu, Woo Jong
• Is Part Of: Advanced materials. Volume 29:Issue 44(2017)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2017-09-26
• Subjects: flexible memristors -- floating gates -- graphene -- heterostructures -- transition‐metal dichalcogenides; Materials -- Periodicals; Chemical vapor deposition -- Periodicals; 620.11
• DOI: 10.1002/adma.201703363
• Languages: English
• ISSNs: 0935-9648

Abstract

Abstract: Memristors such as phase‐change memory and resistive memory have been proposed to emulate the synaptic activities in neuromorphic systems. However, the low reliability of these types of memories is their biggest challenge for commercialization. Here, a highly reliable memristor array using floating‐gate memory operated by two terminals (source and drain) using van der Waals layered materials is demonstrated. Centimeter‐scale samples (1.5 cm × 1.5 cm) of MoS2 as a channel and graphene as a trap layer grown by chemical vapor deposition (CVD) are used for array fabrication with Al2 O3 as the tunneling barrier. With regard to the memory characteristics, 93% of the devices exhibit an on/off ratio of over 10 3 with an average ratio of 10 4 . The high on/off ratio and reliable endurance in the devices allow stable 6‐level memory applications. The devices also exhibit excellent memory durability over 8000 cycles with a negligible shift in the threshold voltage and on‐current, which is a significant improvement over other types of memristors. In addition, the devices can be strained up to 1% by fabricating on a flexible substrate. This demonstration opens a practical route for next‐generation electronics with CVD‐grown van der Waals layered materials. Abstract : A highly reliable memristor array using floating‐gate memory operated by two terminals (source and drain) using van der Waals' layered materials is demonstrated. Centimeter‐scale samples (1.5 cm × 1.5 cm) of MoS2 as a channel and graphene as a trap layer grown by chemical vapor deposition are used for the array fabrication with Al2 O3 as the tunneling barrier. In the bending test of the tunneling random‐access memory, an on/off ratio of 10 5 is maintained under 0–1% strain showing that devices can be applicable for flexible memristors.