Sampling and time–interleaving strategies to extend high speed digitizers bandwidth. (December 2017)

• Record Type: Journal Article
• Authors: D'Apuzzo, Massimo; D'Arco, Mauro
• Is Part Of: Measurement. Volume 111(2017)
• Page Start: 389
• Page End: 396
• Publication Date: 2017-12
• Subjects: Time interleaving -- Bandwidth interleaving -- Sampling -- High-speed digitizers -- Noise and distortion; Weights and measures -- Periodicals; Measurement -- Periodicals; Measurement; Weights and measures; Periodicals; 530.8
• DOI: 10.1016/j.measurement.2017.08.001
• Languages: English
• ISSNs: 0263-2241

Abstract

Highlights: Extend the input bandwidth of the oscilloscope by means of the existing ADCs. Synchronous time-interleaved ADCs improve the sample rate, but has no effect on the electrical bandwidth. Frequency domain interleaving approaches have high noise floor and involve complex processing operations. Hybrid solutions exploit multi-channel architectures that use both harmonic mixing and time interleaving. Hybrid solutions can widen analog bandwidth and achieve noise reduction. Abstract: Measuring signals in ultra-fast electronic systems requires high-end digital oscilloscopes characterized by extremely large analog bandwidths, up to 100 GHz, and digitization capabilities at least up to the corresponding Nyquist rate, i.e. 200 GS/s or above. This performance can be achieved by means of architectures that implement suitable methodologies, based on synchronous time interleaving, digital bandwidth interleaving, or hybrid approaches merging and exploiting both of the previous concepts. Each of these architectures typically includes a number of innovations, concerning both methods and hardware solutions, which are either covered by patents or classified. The paper presents the architecture of an original high-speed digitizer that exploits frequency conversion and time interleaving techniques. Thanks to the use of 4 time-interleaved channels, each one consisting of a state-of-the-art sampler and an ADC, the proposed solution can increase fourfold the analog bandwidth with respect to the individual ADCs, achieving noise reduction with respect to traditional time interleaved architectures.